problème d'initialisation PIC16f1824 ADC

Question

Bonjour à toutes et à tous, je suis nouveau sur ce site et plus globalement dans le monde de la programmation. Etudiant dans une école d'électronique, je suis sur un projet que je ne peut terminer faute de pouvoir résoudre mon problème de programmation. Alors si vous pouviez m'aider à le régler, ça serait vraiment sympa. Merci d'avance. Descriptif: Je souhaite commander un MOSFET (en tension donc) à la sortie de mon microcontroleur PIC16f1824 I/P se chez Microchip. En fonction de la tension d'entrée reçu à la patte AN0 de mon microcontroleur, j'ai un programme qui doit comparé la valeur mesurée à une valeur que j'aurais choisie, et commander en ouvert ou fermé mon MOSFET. Ca, c'est ce que je souhaite faire. Mon problème est que je n'arrive pas à initialiser mon convertisseur analogique/numérique (ADC), et il semblerait que ça soit un problème de syntaxe. Je me suis servi du headerfile du pic, mais rien n'y fait. Je ne sais pas exactement de quoi vous avez besoin pour faire votre magie, donc je vous envoie un peu tout (lien pour le datasheet du pic + un sujet sur ce site portant sur le pic16f1824 mais qui n'a rien donné au niveau de la syntaxe), tout ça en dessous du code. PS: Le code n'est pas totalement terminé pour l'instant, j'attends de pouvoir éliminer les premières erreurs (dans MPLAB v8.66) avant d'écrire autre chose. Voici le programme : # include /* Vérifier la syntaxe pour la fréquence: page 71 registre OSCCON */ # define _XTAL_FREQ 4000000 -------------------Declaration des sous-programmes utilisés -------------------------- void InitADC(void); unsigned int convertADC(); unsigned int ConversionmV(unsigned int NbAConvertir); // Declaration des variables globales unsigned int ValeurAnalogiqueLSB; unsigned int TensionAnalogiquemV; // Programme principal void main(void) { InitADC(); while(1) { ValeurAnalogiqueLSB= convertADC(); TensionAnalogiquemV= ConversionmV(ValeurAnalogiqueLSB); } // Fin du while } // Fin du main ---------------------- Sous-programmes d'initialisation------------------------------- //FVRCON= %11000011; // Fixed Voltage reference paragraphe 14 datasheet // FVRCON=0xC3; // Autre écriture, mais ne fonctionne pas non plus ADCON0 = %0000000011 ADCON1 = %10100000 //TRISA0= 1; ----------------------Sous-programme de conversion analogique------------------- unsigned int convertADC() { GO_nDONE=1; // Lancement de la conversion (on le trouve dans ADCON0) unsigned int ResultatMesure=0; while(GO_nDONE==1){ ResultatMesure= ADRESH+ADRESL<<8; } // Fin du while return ResultatMesure; } // Fin de convertADC unsigned int ConversionmV( unsigned int NbAConvertir) { unsigned long TamponCalcul= NbAConvertir*5000; TamponCalcul= TamponCalcul/1023; return TamponCalcul; } // Fin de ConversionmV /* ------------------Sous-programme de vérification de la tension------------------------ unsigned int veriftension() { */ Ressources : http://www.alldatasheet.com/view.jsp?Searchword=PIC16F1824 http://www.picbasic.co.uk/forum/showthread.php?t=14702 Header File pic16f1824 : #ifndef _HTC_H_ #warning Header file pic16f1824.h included directly. Use #include instead. #endif /* header file for the MICROCHIP PIC microcontroller * 16F1824 */ #ifndef __PIC16F1824_H #define __PIC16F1824_H // // Configuration mask definitions // // Config Register: CONFIG1 #define CONFIG1 0x8007 // Oscillator Selection // ECH, External Clock, High Power Mode (4-32 MHz): device clock supplied to CLKIN pin #define FOSC_ECH 0xFFFF // ECM, External Clock, Medium Power Mode (0.5-4 MHz): device clock supplied to CLKIN pin #define FOSC_ECM 0xFFFE // ECL, External Clock, Low Power Mode (0-0.5 MHz): device clock supplied to CLKIN pin #define FOSC_ECL 0xFFFD // INTOSC oscillator: I/O function on CLKIN pin #define FOSC_INTOSC 0xFFFC // EXTRC oscillator: External RC circuit connected to CLKIN pin #define FOSC_EXTRC 0xFFFB // HS Oscillator, High-speed crystal/resonator connected between OSC1 and OSC2 pins #define FOSC_HS 0xFFFA // XT Oscillator, Crystal/resonator connected between OSC1 and OSC2 pins #define FOSC_XT 0xFFF9 // LP Oscillator, Low-power crystal connected between OSC1 and OSC2 pins #define FOSC_LP 0xFFF8 // Watchdog Timer Enable // WDT enabled #define WDTE_ON 0xFFFF // WDT enabled while running and disabled in Sleep #define WDTE_NSLEEP 0xFFF7 // WDT controlled by the SWDTEN bit in the WDTCON register #define WDTE_SWDTEN 0xFFEF // WDT disabled #define WDTE_OFF 0xFFE7 // Power-up Timer Enable // PWRT disabled #define PWRTE_OFF 0xFFFF // PWRT enabled #define PWRTE_ON 0xFFDF // MCLR Pin Function Select // MCLR/VPP pin function is MCLR #define MCLRE_ON 0xFFFF // MCLR/VPP pin function is digital input #define MCLRE_OFF 0xFFBF // Flash Program Memory Code Protection // Program memory code protection is disabled #define CP_OFF 0xFFFF // Program memory code protection is enabled #define CP_ON 0xFF7F // Data Memory Code Protection // Data memory code protection is disabled #define CPD_OFF 0xFFFF // Data memory code protection is enabled #define CPD_ON 0xFEFF // Brown-out Reset Enable // Brown-out Reset enabled #define BOREN_ON 0xFFFF // Brown-out Reset enabled while running and disabled in Sleep #define BOREN_NSLEEP 0xFDFF // Brown-out Reset controlled by the SBOREN bit in the BORCON register #define BOREN_SBODEN 0xFBFF // Brown-out Reset disabled #define BOREN_OFF 0xF9FF // Clock Out Enable // CLKOUT function is disabled. I/O or oscillator function on the CLKOUT pin #define CLKOUTEN_OFF 0xFFFF // CLKOUT function is enabled on the CLKOUT pin #define CLKOUTEN_ON 0xF7FF // Internal/External Switchover // Internal/External Switchover mode is enabled #define IESO_ON 0xFFFF // Internal/External Switchover mode is disabled #define IESO_OFF 0xEFFF // Fail-Safe Clock Monitor Enable // Fail-Safe Clock Monitor is enabled #define FCMEN_ON 0xFFFF // Fail-Safe Clock Monitor is disabled #define FCMEN_OFF 0xDFFF // Config Register: CONFIG2 #define CONFIG2 0x8008 // Flash Memory Self-Write Protection // Write protection off #define WRT_OFF 0xFFFF // 000h to 1FFh write protected, 200h to FFFh may be modified by EECON control #define WRT_BOOT 0xFFFE // 000h to 7FFh write protected, 800h to FFFh may be modified by EECON control #define WRT_HALF 0xFFFD // 000h to FFFh write protected, no addresses may be modified by EECON control #define WRT_ALL 0xFFFC // PLL Enable // 4x PLL enabled #define PLLEN_ON 0xFFFF // 4x PLL disabled #define PLLEN_OFF 0xFEFF // Stack Overflow/Underflow Reset Enable // Stack Overflow or Underflow will cause a Reset #define STVREN_ON 0xFFFF // Stack Overflow or Underflow will not cause a Reset #define STVREN_OFF 0xFDFF // Brown-out Reset Voltage Selection // Brown-out Reset Voltage (VBOR) set to 1.9 V #define BORV_19 0xFFFF // Brown-out Reset Voltage (VBOR) set to 2.5 V #define BORV_25 0xFBFF // Low-Voltage Programming Enable // Low-voltage programming enabled #define LVP_ON 0xFFFF // High-voltage on MCLR/VPP must be used for programming #define LVP_OFF 0xDFFF // // Special function register definitions // // Register: INDF0 volatile unsigned char INDF0 @ 0x000; // bit and bitfield definitions // Register: INDF1 volatile unsigned char INDF1 @ 0x001; // bit and bitfield definitions // Register: PCL volatile unsigned char PCL @ 0x002; // bit and bitfield definitions // Register: STATUS volatile unsigned char STATUS @ 0x003; // bit and bitfield definitions volatile bit CARRY @ ((unsigned)&STATUS*8)+0; volatile bit DC @ ((unsigned)&STATUS*8)+1; volatile bit ZERO @ ((unsigned)&STATUS*8)+2; volatile bit nPD @ ((unsigned)&STATUS*8)+3; volatile bit nTO @ ((unsigned)&STATUS*8)+4; #ifndef _LIB_BUILD volatile union { struct { unsigned C : 1; unsigned DC : 1; unsigned Z : 1; unsigned nPD : 1; unsigned nTO : 1; unsigned : 2; unsigned : 1; }; } STATUSbits @ 0x003; #endif // bit and bitfield definitions // Register: FSR0L volatile unsigned char FSR0L @ 0x004; // bit and bitfield definitions // Register: FSR0H volatile unsigned char FSR0H @ 0x005; // bit and bitfield definitions // Register: FSR0 volatile unsigned int FSR0 @ 0x004; // bit and bitfield definitions // Register: FSR1L volatile unsigned char FSR1L @ 0x006; // bit and bitfield definitions // Register: FSR1H volatile unsigned char FSR1H @ 0x007; // bit and bitfield definitions // Register: FSR1 volatile unsigned int FSR1 @ 0x006; // Register: BSR volatile unsigned char BSR @ 0x008; // bit and bitfield definitions volatile bit BSR0 @ ((unsigned)&BSR*8)+0; volatile bit BSR1 @ ((unsigned)&BSR*8)+1; volatile bit BSR2 @ ((unsigned)&BSR*8)+2; volatile bit BSR3 @ ((unsigned)&BSR*8)+3; volatile bit BSR4 @ ((unsigned)&BSR*8)+4; #ifndef _LIB_BUILD volatile union { struct { unsigned BSR0 : 1; unsigned BSR1 : 1; unsigned BSR2 : 1; unsigned BSR3 : 1; unsigned BSR4 : 1; }; struct { unsigned BSR : 5; }; } BSRbits @ 0x008; #endif // Register: WREG volatile unsigned char WREG @ 0x009; // bit and bitfield definitions // Register: PCLATH volatile unsigned char PCLATH @ 0x00A; // bit and bitfield definitions #ifndef _LIB_BUILD volatile union { struct { unsigned PCLATH : 7; }; } PCLATHbits @ 0x00A; #endif // Register: INTCON volatile unsigned char INTCON @ 0x00B; // bit and bitfield definitions volatile bit IOCIF @ ((unsigned)&INTCON*8)+0; volatile bit INTF @ ((unsigned)&INTCON*8)+1; volatile bit TMR0IF @ ((unsigned)&INTCON*8)+2; volatile bit IOCIE @ ((unsigned)&INTCON*8)+3; volatile bit INTE @ ((unsigned)&INTCON*8)+4; volatile bit TMR0IE @ ((unsigned)&INTCON*8)+5; volatile bit PEIE @ ((unsigned)&INTCON*8)+6; volatile bit GIE @ ((unsigned)&INTCON*8)+7; volatile bit T0IF @ ((unsigned)&INTCON*8)+2; volatile bit T0IE @ ((unsigned)&INTCON*8)+5; #ifndef _LIB_BUILD volatile union { struct { unsigned IOCIF : 1; unsigned INTF : 1; unsigned TMR0IF : 1; unsigned IOCIE : 1; unsigned INTE : 1; unsigned TMR0IE : 1; unsigned PEIE : 1; unsigned GIE : 1; }; struct { unsigned : 2; unsigned T0IF : 1; unsigned : 2; unsigned T0IE : 1; }; } INTCONbits @ 0x00B; #endif // Register: PORTA volatile unsigned char PORTA @ 0x00C; // bit and bitfield definitions volatile bit RA0 @ ((unsigned)&PORTA*8)+0; volatile bit RA1 @ ((unsigned)&PORTA*8)+1; volatile bit RA2 @ ((unsigned)&PORTA*8)+2; volatile bit RA3 @ ((unsigned)&PORTA*8)+3; volatile bit RA4 @ ((unsigned)&PORTA*8)+4; volatile bit RA5 @ ((unsigned)&PORTA*8)+5; #ifndef _LIB_BUILD volatile union { struct { unsigned RA0 : 1; unsigned RA1 : 1; unsigned RA2 : 1; unsigned RA3 : 1; unsigned RA4 : 1; unsigned RA5 : 1; unsigned : 1; unsigned : 1; }; } PORTAbits @ 0x00C; #endif // Register: PORTC volatile unsigned char PORTC @ 0x00E; // bit and bitfield definitions volatile bit RC0 @ ((unsigned)&PORTC*8)+0; volatile bit RC1 @ ((unsigned)&PORTC*8)+1; volatile bit RC2 @ ((unsigned)&PORTC*8)+2; volatile bit RC3 @ ((unsigned)&PORTC*8)+3; volatile bit RC4 @ ((unsigned)&PORTC*8)+4; volatile bit RC5 @ ((unsigned)&PORTC*8)+5; #ifndef _LIB_BUILD volatile union { struct { unsigned RC0 : 1; unsigned RC1 : 1; unsigned RC2 : 1; unsigned RC3 : 1; unsigned RC4 : 1; unsigned RC5 : 1; unsigned : 1; unsigned : 1; }; } PORTCbits @ 0x00E; #endif // Register: PIR1 volatile unsigned char PIR1 @ 0x011; // bit and bitfield definitions // TMR1 Overflow Interrupt Flag bit volatile bit TMR1IF @ ((unsigned)&PIR1*8)+0; // TMR2 to PR2 Match Interrupt Flag bit volatile bit TMR2IF @ ((unsigned)&PIR1*8)+1; // CCP1 Interrupt Flag bit volatile bit CCP1IF @ ((unsigned)&PIR1*8)+2; // Master Synchronous Serial Port (MSSP) Interrupt Flag bit volatile bit SSP1IF @ ((unsigned)&PIR1*8)+3; // EUSART Transmit Interrupt Flag bit volatile bit TXIF @ ((unsigned)&PIR1*8)+4; // EUSART Receive Interrupt Flag bit volatile bit RCIF @ ((unsigned)&PIR1*8)+5; // A/D Converter Interrupt Flag bit volatile bit ADIF @ ((unsigned)&PIR1*8)+6; // Timer1 Gate Interrupt Flag bit volatile bit TMR1GIF @ ((unsigned)&PIR1*8)+7; #ifndef _LIB_BUILD volatile union { struct { unsigned TMR1IF : 1; unsigned TMR2IF : 1; unsigned CCP1IF : 1; unsigned SSP1IF : 1; unsigned TXIF : 1; unsigned RCIF : 1; unsigned ADIF : 1; unsigned TMR1GIF : 1; }; } PIR1bits @ 0x011; #endif // Register: PIR2 volatile unsigned char PIR2 @ 0x012; // bit and bitfield definitions volatile bit CCP2IF @ ((unsigned)&PIR2*8)+0; volatile bit BCL1IF @ ((unsigned)&PIR2*8)+3; volatile bit EEIF @ ((unsigned)&PIR2*8)+4; volatile bit C1IF @ ((unsigned)&PIR2*8)+5; volatile bit C2IF @ ((unsigned)&PIR2*8)+6; volatile bit OSFIF @ ((unsigned)&PIR2*8)+7; #ifndef _LIB_BUILD volatile union { struct { unsigned CCP2IF : 1; unsigned : 1; unsigned : 1; unsigned BCL1IF : 1; unsigned EEIF : 1; unsigned C1IF : 1; unsigned C2IF : 1; unsigned OSFIF : 1; }; } PIR2bits @ 0x012; #endif // Register: PIR3 volatile unsigned char PIR3 @ 0x013; // bit and bitfield definitions volatile bit TMR4IF @ ((unsigned)&PIR3*8)+1; volatile bit TMR6IF @ ((unsigned)&PIR3*8)+3; volatile bit CCP3IF @ ((unsigned)&PIR3*8)+4; volatile bit CCP4IF @ ((unsigned)&PIR3*8)+5; #ifndef _LIB_BUILD volatile union { struct { unsigned : 1; unsigned TMR4IF : 1; unsigned : 1; unsigned TMR6IF : 1; unsigned CCP3IF : 1; unsigned CCP4IF : 1; }; } PIR3bits @ 0x013; #endif // Register: TMR0 volatile unsigned char TMR0 @ 0x015; // bit and bitfield definitions // bit and bitfield definitions // Register: TMR1L volatile unsigned char TMR1L @ 0x016; // bit and bitfield definitions // Register: TMR1H volatile unsigned char TMR1H @ 0x017; // bit and bitfield definitions // Register: TMR1 volatile unsigned int TMR1 @ 0x016; // Register: T1CON volatile unsigned char T1CON @ 0x018; // bit and bitfield definitions volatile bit TMR1ON @ ((unsigned)&T1CON*8)+0; volatile bit nT1SYNC @ ((unsigned)&T1CON*8)+2; volatile bit T1OSCEN @ ((unsigned)&T1CON*8)+3; volatile bit T1CKPS0 @ ((unsigned)&T1CON*8)+4; volatile bit T1CKPS1 @ ((unsigned)&T1CON*8)+5; volatile bit TMR1CS0 @ ((unsigned)&T1CON*8)+6; volatile bit TMR1CS1 @ ((unsigned)&T1CON*8)+7; #ifndef _LIB_BUILD volatile union { struct { unsigned TMR1ON : 1; unsigned : 1; unsigned nT1SYNC : 1; unsigned T1OSCEN : 1; unsigned T1CKPS0 : 1; unsigned T1CKPS1 : 1; unsigned TMR1CS0 : 1; unsigned TMR1CS1 : 1; }; struct { unsigned : 4; unsigned T1CKPS : 2; unsigned TMR1CS : 2; }; } T1CONbits @ 0x018; #endif // Register: T1GCON volatile unsigned char T1GCON @ 0x019; // bit and bitfield definitions volatile bit T1GSS0 @ ((unsigned)&T1GCON*8)+0; volatile bit T1GSS1 @ ((unsigned)&T1GCON*8)+1; volatile bit T1GVAL @ ((unsigned)&T1GCON*8)+2; volatile bit T1GGO_nDONE @ ((unsigned)&T1GCON*8)+3; volatile bit T1GSPM @ ((unsigned)&T1GCON*8)+4; volatile bit T1GTM @ ((unsigned)&T1GCON*8)+5; volatile bit T1GPOL @ ((unsigned)&T1GCON*8)+6; volatile bit TMR1GE @ ((unsigned)&T1GCON*8)+7; volatile bit T1GGO @ ((unsigned)&T1GCON*8)+3; #ifndef _LIB_BUILD volatile union { struct { unsigned T1GSS0 : 1; unsigned T1GSS1 : 1; unsigned T1GVAL : 1; unsigned T1GGO_nDONE : 1; unsigned T1GSPM : 1; unsigned T1GTM : 1; unsigned T1GPOL : 1; unsigned TMR1GE : 1; }; struct { unsigned T1GSS : 2; unsigned : 1; unsigned T1GGO : 1; }; } T1GCONbits @ 0x019; #endif // Register: TMR2 volatile unsigned char TMR2 @ 0x01A; // bit and bitfield definitions // Register: PR2 volatile unsigned char PR2 @ 0x01B; // bit and bitfield definitions // Register: T2CON volatile unsigned char T2CON @ 0x01C; // bit and bitfield definitions volatile bit T2CKPS0 @ ((unsigned)&T2CON*8)+0; volatile bit T2CKPS1 @ ((unsigned)&T2CON*8)+1; volatile bit TMR2ON @ ((unsigned)&T2CON*8)+2; volatile bit T2OUTPS0 @ ((unsigned)&T2CON*8)+3; volatile bit T2OUTPS1 @ ((unsigned)&T2CON*8)+4; volatile bit T2OUTPS2 @ ((unsigned)&T2CON*8)+5; volatile bit T2OUTPS3 @ ((unsigned)&T2CON*8)+6; #ifndef _LIB_BUILD volatile union { struct { unsigned T2CKPS0 : 1; unsigned T2CKPS1 : 1; unsigned TMR2ON : 1; unsigned T2OUTPS0 : 1; unsigned T2OUTPS1 : 1; unsigned T2OUTPS2 : 1; unsigned T2OUTPS3 : 1; }; struct { unsigned T2CKPS : 2; unsigned : 1; unsigned T2OUTPS : 4; }; } T2CONbits @ 0x01C; #endif // Register: CPSCON0 volatile unsigned char CPSCON0 @ 0x01E; // bit and bitfield definitions volatile bit T0XCS @ ((unsigned)&CPSCON0*8)+0; volatile bit CPSOUT @ ((unsigned)&CPSCON0*8)+1; volatile bit CPSRNG0 @ ((unsigned)&CPSCON0*8)+2; volatile bit CPSRNG1 @ ((unsigned)&CPSCON0*8)+3; volatile bit CPSRM @ ((unsigned)&CPSCON0*8)+6; volatile bit CPSON @ ((unsigned)&CPSCON0*8)+7; #ifndef _LIB_BUILD volatile union { struct { unsigned T0XCS : 1; unsigned CPSOUT : 1; unsigned CPSRNG0 : 1; unsigned CPSRNG1 : 1; unsigned : 2; unsigned CPSRM : 1; unsigned CPSON : 1; }; struct { unsigned : 2; unsigned CPSRNG : 2; }; } CPSCON0bits @ 0x01E; #endif // Register: CPSCON1 volatile unsigned char CPSCON1 @ 0x01F; // bit and bitfield definitions volatile bit CPSCH0 @ ((unsigned)&CPSCON1*8)+0; volatile bit CPSCH1 @ ((unsigned)&CPSCON1*8)+1; volatile bit CPSCH2 @ ((unsigned)&CPSCON1*8)+2; volatile bit CPSCH3 @ ((unsigned)&CPSCON1*8)+3; #ifndef _LIB_BUILD volatile union { struct { unsigned CPSCH0 : 1; unsigned CPSCH1 : 1; unsigned CPSCH2 : 1; unsigned CPSCH3 : 1; }; struct { unsigned CPSCH : 3; unsigned : 1; }; } CPSCON1bits @ 0x01F; #endif // // Special function register definitions: Bank 1 // // Register: TRISA // PORTA Data Direction Control Register volatile unsigned char TRISA @ 0x08C; // bit and bitfield definitions volatile bit TRISA0 @ ((unsigned)&TRISA*8)+0; volatile bit TRISA1 @ ((unsigned)&TRISA*8)+1; volatile bit TRISA2 @ ((unsigned)&TRISA*8)+2; volatile bit TRISA3 @ ((unsigned)&TRISA*8)+3; volatile bit TRISA4 @ ((unsigned)&TRISA*8)+4; volatile bit TRISA5 @ ((unsigned)&TRISA*8)+5; #ifndef _LIB_BUILD volatile union { struct { unsigned TRISA0 : 1; unsigned TRISA1 : 1; unsigned TRISA2 : 1; unsigned TRISA3 : 1; unsigned TRISA4 : 1; unsigned TRISA5 : 1; unsigned : 1; unsigned : 1; }; struct { unsigned TRISA : 6; unsigned : 2; }; } TRISAbits @ 0x08C; #endif // Register: TRISC // PORTB Data Direction Control Register volatile unsigned char TRISC @ 0x08E; // bit and bitfield definitions volatile bit TRISC0 @ ((unsigned)&TRISC*8)+0; volatile bit TRISC1 @ ((unsigned)&TRISC*8)+1; volatile bit TRISC2 @ ((unsigned)&TRISC*8)+2; volatile bit TRISC3 @ ((unsigned)&TRISC*8)+3; volatile bit TRISC4 @ ((unsigned)&TRISC*8)+4; volatile bit TRISC5 @ ((unsigned)&TRISC*8)+5; #ifndef _LIB_BUILD volatile union { struct { unsigned TRISC0 : 1; unsigned TRISC1 : 1; unsigned TRISC2 : 1; unsigned TRISC3 : 1; unsigned TRISC4 : 1; unsigned TRISC5 : 1; unsigned : 1; unsigned : 1; }; struct { unsigned TRISC : 6; unsigned : 2; }; } TRISCbits @ 0x08E; #endif // Register: PIE1 // Peripheral Interrupt Enable Register 1 volatile unsigned char PIE1 @ 0x091; // bit and bitfield definitions // TMR1 Overflow Interrupt Enable bit volatile bit TMR1IE @ ((unsigned)&PIE1*8)+0; // TMR2 to PR2 Match Interrupt Enable bit volatile bit TMR2IE @ ((unsigned)&PIE1*8)+1; // CCP1 Interrupt Enable bit volatile bit CCP1IE @ ((unsigned)&PIE1*8)+2; // Master Synchronous Serial Port (MSSP) Interrupt Enable bit volatile bit SSP1IE @ ((unsigned)&PIE1*8)+3; // EUSART Transmit Interrupt Enable bit volatile bit TXIE @ ((unsigned)&PIE1*8)+4; // EUSART Receive Interrupt Enable bit volatile bit RCIE @ ((unsigned)&PIE1*8)+5; // A/D Converter Interrupt Enable bit volatile bit ADIE @ ((unsigned)&PIE1*8)+6; // Timer1 Gate Interrupt Enable bit volatile bit TMR1GIE @ ((unsigned)&PIE1*8)+7; #ifndef _LIB_BUILD volatile union { struct { unsigned TMR1IE : 1; unsigned TMR2IE : 1; unsigned CCP1IE : 1; unsigned SSP1IE : 1; unsigned TXIE : 1; unsigned RCIE : 1; unsigned ADIE : 1; unsigned TMR1GIE : 1; }; } PIE1bits @ 0x091; #endif // Register: PIE2 // Peripheral Interrupt Enable Register 2 volatile unsigned char PIE2 @ 0x092; // bit and bitfield definitions volatile bit CCP2IE @ ((unsigned)&PIE2*8)+0; // MSSP Bus Collision Interrupt Interrupt Enable bit volatile bit BCL1IE @ ((unsigned)&PIE2*8)+3; // EEPROM Write Completion Interrupt Enable bit volatile bit EEIE @ ((unsigned)&PIE2*8)+4; // Comparator C1 Interrupt Enable bit volatile bit C1IE @ ((unsigned)&PIE2*8)+5; // Comparator C2 Interrupt Enable bit volatile bit C2IE @ ((unsigned)&PIE2*8)+6; // CCP2 Interrupt Enable bit volatile bit OSFIE @ ((unsigned)&PIE2*8)+7; #ifndef _LIB_BUILD volatile union { struct { unsigned CCP2IE : 1; unsigned : 1; unsigned : 1; unsigned BCL1IE : 1; unsigned EEIE : 1; unsigned C1IE : 1; unsigned C2IE : 1; unsigned OSFIE : 1; }; } PIE2bits @ 0x092; #endif // Register: PIE3 volatile unsigned char PIE3 @ 0x093; // bit and bitfield definitions volatile bit TMR4IE @ ((unsigned)&PIE3*8)+1; volatile bit TMR6IE @ ((unsigned)&PIE3*8)+3; volatile bit CCP3IE @ ((unsigned)&PIE3*8)+4; volatile bit CCP4IE @ ((unsigned)&PIE3*8)+5; #ifndef _LIB_BUILD volatile union { struct { unsigned : 1; unsigned TMR4IE : 1; unsigned : 1; unsigned TMR6IE : 1; unsigned CCP3IE : 1; unsigned CCP4IE : 1; }; } PIE3bits @ 0x093; #endif // Register: OPTION_REG // Option Register volatile unsigned char OPTION_REG @ 0x095; // bit and bitfield definitions // Prescaler Rate Select bits volatile bit PS0 @ ((unsigned)&OPTION_REG*8)+0; // Prescaler Rate Select bits volatile bit PS1 @ ((unsigned)&OPTION_REG*8)+1; // Prescaler Rate Select bits volatile bit PS2 @ ((unsigned)&OPTION_REG*8)+2; // Prescaler Active bit volatile bit PSA @ ((unsigned)&OPTION_REG*8)+3; // TMR0 Source Edge Select bit volatile bit TMR0SE @ ((unsigned)&OPTION_REG*8)+4; // TMR0 Clock Source Select bit volatile bit TMR0CS @ ((unsigned)&OPTION_REG*8)+5; // Interrupt Edge Select bit volatile bit INTEDG @ ((unsigned)&OPTION_REG*8)+6; // Weak Pull-up Enable bit volatile bit nWPUEN @ ((unsigned)&OPTION_REG*8)+7; volatile bit T0SE @ ((unsigned)&OPTION_REG*8)+4; volatile bit T0CS @ ((unsigned)&OPTION_REG*8)+5; #ifndef _LIB_BUILD volatile union { struct { unsigned PS0 : 1; unsigned PS1 : 1; unsigned PS2 : 1; unsigned PSA : 1; unsigned TMR0SE : 1; unsigned TMR0CS : 1; unsigned INTEDG : 1; unsigned nWPUEN : 1; }; struct { unsigned PS : 3; unsigned : 1; unsigned T0SE : 1; unsigned T0CS : 1; }; } OPTION_REGbits @ 0x095; #endif // Register: PCON // Power Control Register volatile unsigned char PCON @ 0x096; // bit and bitfield definitions // Brown-out Reset Status bit volatile bit nBOR @ ((unsigned)&PCON*8)+0; // Power-on Reset Status bit volatile bit nPOR @ ((unsigned)&PCON*8)+1; // RESET Instruction Flag bit volatile bit nRI @ ((unsigned)&PCON*8)+2; // MCLR Reset Flag bit volatile bit nRMCLR @ ((unsigned)&PCON*8)+3; // Stack Underflow Flag bit volatile bit STKUNF @ ((unsigned)&PCON*8)+6; // Stack Overflow Flag bit volatile bit STKOVF @ ((unsigned)&PCON*8)+7; #ifndef _LIB_BUILD volatile union { struct { unsigned nBOR : 1; unsigned nPOR : 1; unsigned nRI : 1; unsigned nRMCLR : 1; unsigned : 1; unsigned : 1; unsigned STKUNF : 1; unsigned STKOVF : 1; }; } PCONbits @ 0x096; #endif // Register: WDTCON // Watchdog Timer Control Register volatile unsigned char WDTCON @ 0x097; // bit and bitfield definitions // Software Enable/Disable for Watch Dog Timer bit volatile bit SWDTEN @ ((unsigned)&WDTCON*8)+0; // Watchdog Timer Period Select bits volatile bit WDTPS0 @ ((unsigned)&WDTCON*8)+1; // Watchdog Timer Period Select bits volatile bit WDTPS1 @ ((unsigned)&WDTCON*8)+2; // Watchdog Timer Period Select bits volatile bit WDTPS2 @ ((unsigned)&WDTCON*8)+3; // Watchdog Timer Period Select bits volatile bit WDTPS3 @ ((unsigned)&WDTCON*8)+4; // Watchdog Timer Period Select bits volatile bit WDTPS4 @ ((unsigned)&WDTCON*8)+5; #ifndef _LIB_BUILD volatile union { struct { unsigned SWDTEN : 1; unsigned WDTPS0 : 1; unsigned WDTPS1 : 1; unsigned WDTPS2 : 1; unsigned WDTPS3 : 1; unsigned WDTPS4 : 1; }; struct { unsigned : 1; unsigned WDTPS : 5; }; } WDTCONbits @ 0x097; #endif // Register: OSCTUNE // Oscillator Tuning Register volatile unsigned char OSCTUNE @ 0x098; // bit and bitfield definitions // Frequency Tuning bits volatile bit TUN0 @ ((unsigned)&OSCTUNE*8)+0; // Frequency Tuning bits volatile bit TUN1 @ ((unsigned)&OSCTUNE*8)+1; // Frequency Tuning bits volatile bit TUN2 @ ((unsigned)&OSCTUNE*8)+2; // Frequency Tuning bits volatile bit TUN3 @ ((unsigned)&OSCTUNE*8)+3; // Frequency Tuning bits volatile bit TUN4 @ ((unsigned)&OSCTUNE*8)+4; // Frequency Tuning bits volatile bit TUN5 @ ((unsigned)&OSCTUNE*8)+5; #ifndef _LIB_BUILD volatile union { struct { unsigned TUN0 : 1; unsigned TUN1 : 1; unsigned TUN2 : 1; unsigned TUN3 : 1; unsigned TUN4 : 1; unsigned TUN5 : 1; }; struct { unsigned TUN : 6; }; } OSCTUNEbits @ 0x098; #endif // Register: OSCCON // Oscillator Control Register volatile unsigned char OSCCON @ 0x099; // bit and bitfield definitions // System clock select bit volatile bit SCS0 @ ((unsigned)&OSCCON*8)+0; // System clock select bit volatile bit SCS1 @ ((unsigned)&OSCCON*8)+1; // Internal Oscillator Frequency Select bits volatile bit IRCF0 @ ((unsigned)&OSCCON*8)+3; // Internal Oscillator Frequency Select bits volatile bit IRCF1 @ ((unsigned)&OSCCON*8)+4; // Internal Oscillator Frequency Select bits volatile bit IRCF2 @ ((unsigned)&OSCCON*8)+5; // Internal Oscillator Frequency Select bits volatile bit IRCF3 @ ((unsigned)&OSCCON*8)+6; // Software PLL Enable bit volatile bit SPLLEN @ ((unsigned)&OSCCON*8)+7; #ifndef _LIB_BUILD volatile union { struct { unsigned SCS0 : 1; unsigned SCS1 : 1; unsigned : 1; unsigned IRCF0 : 1; unsigned IRCF1 : 1; unsigned IRCF2 : 1; unsigned IRCF3 : 1; unsigned SPLLEN : 1; }; struct { unsigned SCS : 2; unsigned : 1; unsigned IRCF : 4; }; } OSCCONbits @ 0x099; #endif // Register: OSCSTAT // Oscillator Status Register volatile unsigned char OSCSTAT @ 0x09A; // bit and bitfield definitions // Low Freqency Internal Oscillator Ready bit volatile bit HFIOFS @ ((unsigned)&OSCSTAT*8)+0; // Low Freqency Internal Oscillator Ready bit volatile bit LFIOFR @ ((unsigned)&OSCSTAT*8)+1; // Medium Freqency Internal Oscillator Ready bit volatile bit MFIOFR @ ((unsigned)&OSCSTAT*8)+2; // High Freqency Internal Oscillator Status Locked bit volatile bit HFIOFL @ ((unsigned)&OSCSTAT*8)+3; // High Freqency Internal Oscillator Ready bit volatile bit HFIOFR @ ((unsigned)&OSCSTAT*8)+4; // Oscillator Start-up Time-out Status bit volatile bit OSTS @ ((unsigned)&OSCSTAT*8)+5; // 4x PLL Ready bit volatile bit PLLR @ ((unsigned)&OSCSTAT*8)+6; // Timer1 Oscillator Ready bit volatile bit T1OSCR @ ((unsigned)&OSCSTAT*8)+7; #ifndef _LIB_BUILD volatile union { struct { unsigned HFIOFS : 1; unsigned LFIOFR : 1; unsigned MFIOFR : 1; unsigned HFIOFL : 1; unsigned HFIOFR : 1; unsigned OSTS : 1; unsigned PLLR : 1; unsigned T1OSCR : 1; }; } OSCSTATbits @ 0x09A; #endif // bit and bitfield definitions // Register: ADRESL // A/D Result Register LSB volatile unsigned char ADRESL @ 0x09B; // bit and bitfield definitions // Register: ADRESH // A/D Result Register MSB volatile unsigned char ADRESH @ 0x09C; // bit and bitfield definitions // Register: ADRES volatile unsigned int ADRES @ 0x09B; // Register: ADCON0 // Analog-to-Digital Control Register 0 volatile unsigned char ADCON0 @ 0x09D; // bit and bitfield definitions // A/D Module Enable bit volatile bit ADON @ ((unsigned)&ADCON0*8)+0; // A/D Conversion Status bit volatile bit GO_nDONE @ ((unsigned)&ADCON0*8)+1; // Analog Channel Select bits volatile bit CHS0 @ ((unsigned)&ADCON0*8)+2; // Analog Channel Select bits volatile bit CHS1 @ ((unsigned)&ADCON0*8)+3; // Analog Channel Select bits volatile bit CHS2 @ ((unsigned)&ADCON0*8)+4; // Analog Channel Select bits volatile bit CHS3 @ ((unsigned)&ADCON0*8)+5; // Analog Channel Select bits volatile bit CHS4 @ ((unsigned)&ADCON0*8)+6; // A/D Conversion Status bit volatile bit ADGO @ ((unsigned)&ADCON0*8)+1; // A/D Conversion Status bit volatile bit GO @ ((unsigned)&ADCON0*8)+1; #ifndef _LIB_BUILD volatile union { struct { unsigned ADON : 1; unsigned GO_nDONE : 1; unsigned CHS0 : 1; unsigned CHS1 : 1; unsigned CHS2 : 1; unsigned CHS3 : 1; unsigned CHS4 : 1; unsigned : 1; }; struct { unsigned : 1; unsigned ADGO : 1; unsigned CHS : 5; }; struct { unsigned : 1; unsigned GO : 1; }; } ADCON0bits @ 0x09D; #endif // Register: ADCON1 // Analog-to-Digital Control Register 1 volatile unsigned char ADCON1 @ 0x09E; // bit and bitfield definitions // A/D Positive Voltage Reference Configuration volatile bit ADPREF0 @ ((unsigned)&ADCON1*8)+0; // A/D Positive Voltage Reference Configuration volatile bit ADPREF1 @ ((unsigned)&ADCON1*8)+1; // A/D Negative Voltage Reference Configuration volatile bit ADNREF @ ((unsigned)&ADCON1*8)+2; // A/D Conversion Clock Select bits volatile bit ADCS0 @ ((unsigned)&ADCON1*8)+4; // A/D Conversion Clock Select bits volatile bit ADCS1 @ ((unsigned)&ADCON1*8)+5; // A/D Conversion Clock Select bits volatile bit ADCS2 @ ((unsigned)&ADCON1*8)+6; // A/D Result Format Select bit volatile bit ADFM @ ((unsigned)&ADCON1*8)+7; #ifndef _LIB_BUILD volatile union { struct { unsigned ADPREF0 : 1; unsigned ADPREF1 : 1; unsigned ADNREF : 1; unsigned : 1; unsigned ADCS0 : 1; unsigned ADCS1 : 1; unsigned ADCS2 : 1; unsigned ADFM : 1; }; struct { unsigned ADPREF : 2; unsigned : 2; unsigned ADCS : 3; }; } ADCON1bits @ 0x09E; #endif // // Special function register definitions: Bank 2 // // Register: LATA volatile unsigned char LATA @ 0x10C; // bit and bitfield definitions volatile bit LATA0 @ ((unsigned)&LATA*8)+0; volatile bit LATA1 @ ((unsigned)&LATA*8)+1; volatile bit LATA2 @ ((unsigned)&LATA*8)+2; volatile bit LATA4 @ ((unsigned)&LATA*8)+4; volatile bit LATA5 @ ((unsigned)&LATA*8)+5; #ifndef _LIB_BUILD volatile union { struct { unsigned LATA0 : 1; unsigned LATA1 : 1; unsigned LATA2 : 1; unsigned : 1; unsigned LATA4 : 1; unsigned LATA5 : 1; unsigned : 1; unsigned : 1; }; struct { unsigned LATA : 6; unsigned : 2; }; } LATAbits @ 0x10C; #endif // Register: LATC volatile unsigned char LATC @ 0x10E; // bit and bitfield definitions volatile bit LATC0 @ ((unsigned)&LATC*8)+0; volatile bit LATC1 @ ((unsigned)&LATC*8)+1; volatile bit LATC2 @ ((unsigned)&LATC*8)+2; volatile bit LATC3 @ ((unsigned)&LATC*8)+3; volatile bit LATC4 @ ((unsigned)&LATC*8)+4; volatile bit LATC5 @ ((unsigned)&LATC*8)+5; #ifndef _LIB_BUILD volatile union { struct { unsigned LATC0 : 1; unsigned LATC1 : 1; unsigned LATC2 : 1; unsigned LATC3 : 1; unsigned LATC4 : 1; unsigned LATC5 : 1; unsigned : 1; unsigned : 1; }; struct { unsigned LATC : 6; unsigned : 2; }; } LATCbits @ 0x10E; #endif // Register: CM1CON0 volatile unsigned char CM1CON0 @ 0x111; // bit and bitfield definitions // Comparator Output Synchronous Mode bit volatile bit C1SYNC @ ((unsigned)&CM1CON0*8)+0; // Comparator Hysteresis Enable bit volatile bit C1HYS @ ((unsigned)&CM1CON0*8)+1; // Comparator Speed/Power Select bit volatile bit C1SP @ ((unsigned)&CM1CON0*8)+2; // Comparator Output Polarity Select bit volatile bit C1POL @ ((unsigned)&CM1CON0*8)+4; // Comparator Output Enable bit volatile bit C1OE @ ((unsigned)&CM1CON0*8)+5; // Comparator Output bit volatile bit C1OUT @ ((unsigned)&CM1CON0*8)+6; // Comparator Enable bit volatile bit C1ON @ ((unsigned)&CM1CON0*8)+7; #ifndef _LIB_BUILD volatile union { struct { unsigned C1SYNC : 1; unsigned C1HYS : 1; unsigned C1SP : 1; unsigned : 1; unsigned C1POL : 1; unsigned C1OE : 1; unsigned C1OUT : 1; unsigned C1ON : 1; }; } CM1CON0bits @ 0x111; #endif // Register: CM1CON1 volatile unsigned char CM1CON1 @ 0x112; // bit and bitfield definitions // Comparator Negative Input Channel Select bits volatile bit C1NCH0 @ ((unsigned)&CM1CON1*8)+0; // Comparator Negative Input Channel Select bits volatile bit C1NCH1 @ ((unsigned)&CM1CON1*8)+1; // Comparator Positive Input Channel Select bits volatile bit C1PCH0 @ ((unsigned)&CM1CON1*8)+4; // Comparator Positive Input Channel Select bits volatile bit C1PCH1 @ ((unsigned)&CM1CON1*8)+5; // Comparator Interrupt on Negative going edge Enable bits volatile bit C1INTN @ ((unsigned)&CM1CON1*8)+6; // Comparator Interrupt on Positive going edge Enable bits volatile bit C1INTP @ ((unsigned)&CM1CON1*8)+7; #ifndef _LIB_BUILD volatile union { struct { unsigned C1NCH0 : 1; unsigned C1NCH1 : 1; unsigned : 2; unsigned C1PCH0 : 1; unsigned C1PCH1 : 1; unsigned C1INTN : 1; unsigned C1INTP : 1; }; struct { unsigned C1NCH : 2; unsigned : 2; unsigned C1PCH : 2; }; } CM1CON1bits @ 0x112; #endif // Register: CM2CON0 volatile unsigned char CM2CON0 @ 0x113; // bit and bitfield definitions volatile bit C2SYNC @ ((unsigned)&CM2CON0*8)+0; volatile bit C2HYS @ ((unsigned)&CM2CON0*8)+1; volatile bit C2SP @ ((unsigned)&CM2CON0*8)+2; volatile bit C2POL @ ((unsigned)&CM2CON0*8)+4; volatile bit C2OE @ ((unsigned)&CM2CON0*8)+5; volatile bit C2OUT @ ((unsigned)&CM2CON0*8)+6; volatile bit C2ON @ ((unsigned)&CM2CON0*8)+7; #ifndef _LIB_BUILD volatile union { struct { unsigned C2SYNC : 1; unsigned C2HYS : 1; unsigned C2SP : 1; unsigned : 1; unsigned C2POL : 1; unsigned C2OE : 1; unsigned C2OUT : 1; unsigned C2ON : 1; }; } CM2CON0bits @ 0x113; #endif // Register: CM2CON1 volatile unsigned char CM2CON1 @ 0x114; // bit and bitfield definitions // Comparator Negative Input Channel Select bits volatile bit C2NCH0 @ ((unsigned)&CM2CON1*8)+0; // Comparator Negative Input Channel Select bits volatile bit C2NCH1 @ ((unsigned)&CM2CON1*8)+1; // Comparator Positive Input Channel Select bits volatile bit C2PCH0 @ ((unsigned)&CM2CON1*8)+4; // Comparator Positive Input Channel Select bits volatile bit C2PCH1 @ ((unsigned)&CM2CON1*8)+5; // Comparator Interrupt on Negative going edge Enable bits volatile bit C2INTN @ ((unsigned)&CM2CON1*8)+6; // Comparator Interrupt on Positive going edge Enable bits volatile bit C2INTP @ ((unsigned)&CM2CON1*8)+7; #ifndef _LIB_BUILD volatile union { struct { unsigned C2NCH0 : 1; unsigned C2NCH1 : 1; unsigned : 2; unsigned C2PCH0 : 1; unsigned C2PCH1 : 1; unsigned C2INTN : 1; unsigned C2INTP : 1; }; struct { unsigned C2NCH : 2; unsigned : 2; unsigned C2PCH : 2; }; } CM2CON1bits @ 0x114; #endif // Register: CMOUT // Comparator Output Register volatile unsigned char CMOUT @ 0x115; // bit and bitfield definitions volatile bit MC1OUT @ ((unsigned)&CMOUT*8)+0; volatile bit MC2OUT @ ((unsigned)&CMOUT*8)+1; #ifndef _LIB_BUILD volatile union { struct { unsigned MC1OUT : 1; unsigned MC2OUT : 1; }; } CMOUTbits @ 0x115; #endif // Register: BORCON // Brown-out Reset Control Register volatile unsigned char BORCON @ 0x116; // bit and bitfield definitions // Brown-out Reset Circuit Ready Status bit volatile bit BORRDY @ ((unsigned)&BORCON*8)+0; // Software Brown Out Reset Enable bit volatile bit SBOREN @ ((unsigned)&BORCON*8)+7; #ifndef _LIB_BUILD volatile union { struct { unsigned BORRDY : 1; unsigned : 6; unsigned SBOREN : 1; }; } BORCONbits @ 0x116; #endif // Register: FVRCON // Fixed Voltage Reference Control Register volatile unsigned char FVRCON @ 0x117; // bit and bitfield definitions // A/D Converter Fixed Voltage Reference Selection volatile bit ADFVR0 @ ((unsigned)&FVRCON*8)+0; // A/D Converter Fixed Voltage Reference Selection volatile bit ADFVR1 @ ((unsigned)&FVRCON*8)+1; // Comparator and D/A Converter Fixed Voltage Reference Selection volatile bit CDAFVR0 @ ((unsigned)&FVRCON*8)+2; // Comparator and D/A Converter Fixed Voltage Reference Selection volatile bit CDAFVR1 @ ((unsigned)&FVRCON*8)+3; // Fixed Voltage Reference Ready Flag volatile bit FVRRDY @ ((unsigned)&FVRCON*8)+6; // Fixed Voltage Reference Enable volatile bit FVREN @ ((unsigned)&FVRCON*8)+7; #ifndef _LIB_BUILD volatile union { struct { unsigned ADFVR0 : 1; unsigned ADFVR1 : 1; unsigned CDAFVR0 : 1; unsigned CDAFVR1 : 1; unsigned : 1; unsigned : 1; unsigned FVRRDY : 1; unsigned FVREN : 1; }; struct { unsigned ADFVR : 2; unsigned CDAFVR : 2; }; } FVRCONbits @ 0x117; #endif // Register: DACCON0 // Voltage Reference Control Register 0 volatile unsigned char DACCON0 @ 0x118; // bit and bitfield definitions // DAC1 Negative Source Select bits volatile bit DACNSS @ ((unsigned)&DACCON0*8)+0; // DAC1 Positive Source Select bits volatile bit DACPSS0 @ ((unsigned)&DACCON0*8)+2; // DAC1 Positive Source Select bits volatile bit DACPSS1 @ ((unsigned)&DACCON0*8)+3; // DAC1 Voltage Output Enable bit volatile bit DACOE @ ((unsigned)&DACCON0*8)+5; // DAC 1 Low Power Voltage State Select bit volatile bit DACLPS @ ((unsigned)&DACCON0*8)+6; // DAC 1 Enable bit volatile bit DACEN @ ((unsigned)&DACCON0*8)+7; #ifndef _LIB_BUILD volatile union { struct { unsigned DACNSS : 1; unsigned : 1; unsigned DACPSS0 : 1; unsigned DACPSS1 : 1; unsigned : 1; unsigned DACOE : 1; unsigned DACLPS : 1; unsigned DACEN : 1; }; struct { unsigned : 2; unsigned DACPSS : 2; }; } DACCON0bits @ 0x118; #endif // Register: DACCON1 // Voltage Reference Control Register 1 volatile unsigned char DACCON1 @ 0x119; // bit and bitfield definitions // DAC1 Voltage Output Select bits volatile bit DACR0 @ ((unsigned)&DACCON1*8)+0; // DAC1 Voltage Output Select bits volatile bit DACR1 @ ((unsigned)&DACCON1*8)+1; // DAC1 Voltage Output Select bits volatile bit DACR2 @ ((unsigned)&DACCON1*8)+2; // DAC1 Voltage Output Select bits volatile bit DACR3 @ ((unsigned)&DACCON1*8)+3; // DAC1 Voltage Output Select bits volatile bit DACR4 @ ((unsigned)&DACCON1*8)+4; #ifndef _LIB_BUILD volatile union { struct { unsigned DACR0 : 1; unsigned DACR1 : 1; unsigned DACR2 : 1; unsigned DACR3 : 1; unsigned DACR4 : 1; unsigned : 1; }; struct { unsigned DACR : 5; }; } DACCON1bits @ 0x119; #endif // Register: SRCON0 // SR Latch Control Register 0 volatile unsigned char SRCON0 @ 0x11A; // bit and bitfield definitions // Pulse Reset Input of the SR Latch volatile bit SRPR @ ((unsigned)&SRCON0*8)+0; // Pulse Set Input of the SR Latch volatile bit SRPS @ ((unsigned)&SRCON0*8)+1; // SR Latch Q Output Enable bit volatile bit SRNQEN @ ((unsigned)&SRCON0*8)+2; // SR Latch Q Output Enable bit volatile bit SRQEN @ ((unsigned)&SRCON0*8)+3; // SR Latch Clock divider bits volatile bit SRCLK0 @ ((unsigned)&SRCON0*8)+4; // SR Latch Clock divider bits volatile bit SRCLK1 @ ((unsigned)&SRCON0*8)+5; // SR Latch Clock divider bits volatile bit SRCLK2 @ ((unsigned)&SRCON0*8)+6; // SR Latch Enable bit volatile bit SRLEN @ ((unsigned)&SRCON0*8)+7; #ifndef _LIB_BUILD volatile union { struct { unsigned SRPR : 1; unsigned SRPS : 1; unsigned SRNQEN : 1; unsigned SRQEN : 1; unsigned SRCLK0 : 1; unsigned SRCLK1 : 1; unsigned SRCLK2 : 1; unsigned SRLEN : 1; }; struct { unsigned : 4; unsigned SRCLK : 3; }; } SRCON0bits @ 0x11A; #endif // Register: SRCON1 // SR Latch Control Register 1 volatile unsigned char SRCON1 @ 0x11B; // bit and bitfield definitions // SR Latch C1 Reset Enable bit volatile bit SRRC1E @ ((unsigned)&SRCON1*8)+0; // SR Latch C2 Reset Enable bit volatile bit SRRC2E @ ((unsigned)&SRCON1*8)+1; // SR Latch Reset Clock Enable bit volatile bit SRRCKE @ ((unsigned)&SRCON1*8)+2; // SR Latch Peripheral Reset Enable bit volatile bit SRRPE @ ((unsigned)&SRCON1*8)+3; // SR Latch C1 Set Enable bit volatile bit SRSC1E @ ((unsigned)&SRCON1*8)+4; // SR Latch C2 Set Enable bit volatile bit SRSC2E @ ((unsigned)&SRCON1*8)+5; // SR Latch Set Clock Enable bit volatile bit SRSCKE @ ((unsigned)&SRCON1*8)+6; // SR Latch Peripheral Set Enable bit volatile bit SRSPE @ ((unsigned)&SRCON1*8)+7; #ifndef _LIB_BUILD volatile union { struct { unsigned SRRC1E : 1; unsigned SRRC2E : 1; unsigned SRRCKE : 1; unsigned SRRPE : 1; unsigned SRSC1E : 1; unsigned SRSC2E : 1; unsigned SRSCKE : 1; unsigned SRSPE : 1; }; } SRCON1bits @ 0x11B; #endif // Register: APFCON0 // Alternate Pin Function Control Register volatile unsigned char APFCON0 @ 0x11D; // bit and bitfield definitions volatile bit TXCKSEL @ ((unsigned)&APFCON0*8)+2; volatile bit T1GSEL @ ((unsigned)&APFCON0*8)+3; // Timer1 Gate Input Pin Selection volatile bit SSSEL @ ((unsigned)&APFCON0*8)+5; // CCP3 Input/Output Pin Selection volatile bit SDOSEL @ ((unsigned)&APFCON0*8)+6; volatile bit RXDTSEL @ ((unsigned)&APFCON0*8)+7; // Timer1 Gate Input Pin Selection volatile bit SS1SEL @ ((unsigned)&APFCON0*8)+5; // CCP3 Input/Output Pin Selection volatile bit SDO1SEL @ ((unsigned)&APFCON0*8)+6; #ifndef _LIB_BUILD volatile union { struct { unsigned : 1; unsigned : 1; unsigned TXCKSEL : 1; unsigned T1GSEL : 1; unsigned : 1; unsigned SSSEL : 1; unsigned SDOSEL : 1; unsigned RXDTSEL : 1; }; struct { unsigned : 5; unsigned SS1SEL : 1; unsigned SDO1SEL : 1; }; } APFCON0bits @ 0x11D; #endif // Register: APFCON1 volatile unsigned char APFCON1 @ 0x11E; // bit and bitfield definitions volatile bit CCP2SEL @ ((unsigned)&APFCON1*8)+0; volatile bit P2BSEL @ ((unsigned)&APFCON1*8)+1; volatile bit P1CSEL @ ((unsigned)&APFCON1*8)+2; volatile bit P1DSEL @ ((unsigned)&APFCON1*8)+3; #ifndef _LIB_BUILD volatile union { struct { unsigned CCP2SEL : 1; unsigned P2BSEL : 1; unsigned P1CSEL : 1; unsigned P1DSEL : 1; }; } APFCON1bits @ 0x11E; #endif // // Special function register definitions: Bank 3 // // Register: ANSELA volatile unsigned char ANSELA @ 0x18C; // bit and bitfield defini

cs_norton · Answer

Salut, je te joins une partie de mon code utilisé pour un programme que j'ai du réaliser en utilisant un POT pour commander des leds. Je sais pas si ça pourra t'aider ! 


#BIT ADG0 = ADCON0.1
#BIT RB0  = PORTB.0
#BIT RB1  = PORTB.1

void Conversion(); // Déclaration de la fonction conversion.

void Init()
{
   TRISD PORTD 0x00;
   TRISE PORTE 0x00;
   TRISA = 0xFF;
   ADCON0 = 0b00000001;  // Module convertisseur AD actif , canal 0 , AN0 multiplexé sur le conv.
   ADCON1 = 0b00001110;  // Seulement la pin AN0 connectée sur le convertisseur
   ADCON2 0b00011101;  // TACQ 6, TAD car RS = 10k
}

//*************************************************
//* Recois en entrée le canal à convertir	      *
//* Fournis en sortie la valeur analog 8 bits.    *
//*************************************************

unsigned char Adc_read(unsigned char channel)
{
   ADCON0 = (channel << 2) + 0b00000001;

     ADG0 = 1;
      while(ADG0)
continue;
      return (ADRESH); 
}


Voila en espérant que ça pourra t'aider.

jibob · Answer

Bonjour,

Sur le programme C sans tenir compte des spécifications du PIC 16F...
Quelques remarques:

ResultatMesure= ADRESH+ADRESL<<8; 

Cela me paraît bizarre, à mon avis, ce serait plutôt l'inverse

ResultatMesure= ADRESL+ADRESH<<8;

Je ne suis pas certain que les déclarations à la volée soient comprises correctement à la compilation

volatile unsigned char TOSH @ 0xFEF; 

A toi d'envoyer les résultats intermédiaires sur un port RS-232 (ajouter circuit de type MAX232 côté PIC) pour réaliser l'interface avec le port série présent sur PC.

Cordialement

Problème d'initialisation PIC16f1824 ADC

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